The present invention relates to the field of over-voltage protection of integrated circuits and in particular to the protection of a dividing bridge comprised in an integrated circuit and receiving on one of its terminals a voltage higher than the supply voltage of this integrated circuit. Such a dividing bridge constitutes an input range extender for an integrated circuit.
To better understand the problem that the invention aims at solving, FIG. 1 shows an example of an integrated circuit associated with a step up regulator.
In FIG. 1, reference 1 designates an integrated circuit supplied between supply terminals VDD and VSS, for example respectively at +3 V and ground. A step up regulator 2 is also supplied by the voltages VDD and VSS. The step up circuit 2 conventionally comprises, for example, a coil 3 serially connected with a diode 4 and a capacitor 5. The junction of coil 3 and diode 4 is also connected to ground through a pulse controlled switch 6. Accordingly, in a known manner, a voltage V.sub.H is obtained across capacitor 5, which reaches a value higher than voltage VDD, for example 25 V.
For regulating voltage V.sub.H at a constant value, the switch 6 has to be suitably controlled. Accordingly, voltage V.sub.H is measured, its value is compared with a reference value and the comparison result determines the operation of switch 6. This regulation function is carried out by a portion of the integrated circuit 1.
In this integrated circuit, it is possible to have a reference voltage V.sub.O that is comprised between VSS and VDD, for example 1.2 volt. For comparing V.sub.H and V.sub.O, the value V.sub.H has to be divided by a resistive bridge for obtaining a value V.sub.i which is normally equal to V.sub.O. Values V.sub.O and V.sub.i are compared by a comparator 7 which controls one of the inputs of a NAND gate 8, the other input of which receives for example a square signal, and the output of which controls switch 6.
A problem lies in the implementation of the dividing bridge comprising resistors R1 and R2. If this dividing bridge is external to the integrated circuit, there is no specific problem. However, it is generally wished to integrate as many components as possible. Therefore, as shown, R1 and R2 are preferentially arranged inside the integrated circuit and voltage V.sub.H is connected to a pad of the integrated circuit. This pad must be protected against possible overvoltages originating from the voltage step up regulator, for example electrostatic discharges. This type of protection raises a specific problem because, usually, in an integrated circuit, the pad protection circuits clamp overvoltages having a value higher than the high supply potential VDD while, in the specific considered case, voltages V.sub.H which are substantially higher than VDD should not be clamped.
Protection circuits that can be associated with pads receiving high voltages have already been devised in the prior art and for example comprise MOS transistors with a thick gate insulator. However, the implementation of such unusual components is complex.
Moreover, in the field of integrated circuits, for example CMOS integrated circuits, resistors can be in the form of polycristalline stripes deposited on the upper surface of the substrate and insulated therefrom by oxide layers. However, when these resistors receive on one of their terminals a high voltage, they cannot be made on thin oxide layers which would break through under such voltages. Additionally, even with thick oxide layers, voltages applied on those resistors could create capacitive effects with underlying regions of the substrate and could limit the operating frequency of the system. Another drawback of such polysilicon resistors is that they have a low resistance per square and cannot be used for high value resistors. In any case, it is necessary with such resistors to associate with the connection pad an overvoltage protection circuit.
Another conventional way to make resistors in an integrated circuit consists in using doped stripes diffused in the substrate.
An example of such a resistor is schematically shown in the partial section view of FIG. 2A and in the corresponding upper view of FIG. 2B. The resistor is made between contacts A and B of a P-type stripe 10 diffused in a low doped N-type well 11, in turn formed in a low doped P-type substrate 12. An intermediate contact C on stripe 10 between contacts A and B constitutes an intermediate tap. Conventionally, well 10 is biased at the high supply potential VDD by a contact formed on a high doped region 13 arranged at the periphery of the well or at least close to the high potential contact on the stripe. The substrate 12 is biased at the low supply potential VSS. The contacts on the low doped regions are formed through areas of the same conductivity type with a higher doping level. In this conventional implementation, the resistor is insulated by the junction between regions 10 and 11 but this insulation is possible only if voltage V.sub.H remains lower than voltage VDD plus the forward voltage drop of a diode. As soon as V.sub.H gets higher than VDD, junction 10/11 is forward biased and there is no longer an insulation. This conventional implementation is thus not suitable for implementing resistors R1 and R2 in the circuit of FIG. 1.
Accordingly, for making resistors of the type of resistors R1 and R2, polysilicon resistors have conventionally been used with the above mentioned drawbacks.